PTP support with FPGA. Fullstack (hardware/software) development | CEE-SECR 2016 PTP support with FPGA. Fullstack (hardware/software) development – CEE-SECR 2016
2017 | 2016 | 2015 | 2014 | 2013 | 2012 | 2011 | 2010 | 2009 | 2008 | 2007 | 2006 | 2005

Presentations

PTP support with FPGA. Fullstack (hardware/software) development

Presentation will cover problem categories that are not suitable for solving on general-purpose processors. And which fit well on FPGA architecture.

As example we will observe PTP support on System-On-Chip FPGA.

In our example FPGA firmware will contain network packets timestamping and PTP Hardware Clock modules.

Denis Gabidullin

Denis Gabidullin

Lead developer, STC Metrotek

Comment

Your email address will not be published. Required fields are marked *

*

Gold

Deutsche Bank Technology CentreJetBrainsSAPFirst Line Software

Silver

Dell Technologies

Embedded

Auriga

Sponsors

T-SystemsKaspersky Lab

Main partners

RUSSOFTAP KITSECON

In cooperation

Association for Computing MachineryACM Special Interest Group on Software Engineering

Technical partners

Hosting-CenterVirtuozzoSoftInvent7pap StudioPrint SalonGroup MPrezent.ru

With support of

RAEC

Organizers

Software Russiai-Help

The conference is over
See you at CEE-SECR 2017!

Special prices for the hotels and visa support are offered to the conference guests.